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 DM74S283 4-Bit Binary Adder with Fast Carry
August 1986 Revised May 2000
DM74S283 4-Bit Binary Adder with Fast Carry
General Description
These full adders perform the addition of two 4-bit binary numbers. The sum () outputs are provided for each bit and the resultant carry (C4) is obtained from the fourth bit. These adders feature full internal look ahead across all four bits. This provides the system designer with partial lookahead performance at the economy and reduced package count of a ripple-carry implementation. The adder logic, including the carry, is implemented in its true form meaning that the end-around carry can be accomplished without the need for logic or level inversion.
Features
s Full-carry look-ahead across the four bits s Systems achieve partial look-ahead performance with the economy of ripple carry s Typical add times Two 8-bit words 15 ns Two 16-bit words 30 ns s Typical power dissipation 510 mW
Ordering Code:
Order Number DM74S283N Package Number N16E Package Description 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Connection Diagram
(c) 2000 Fairchild Semiconductor Corporation
DS006484
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DM74S283
Function Table
H = HIGH Level, L = LOW Level Note: Input conditions at A1, B1, A2, B2, and C0 are used to determine outputs 1 and 2 and the value of the internal carry C2. The values at C2, A3, B3, A4, and B4 are then used to determine outputs 3, 4, and C4.
Logic Diagram
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DM74S283
Absolute Maximum Ratings(Note 1)
Supply Voltage Input Voltage Operating Free Air Temperature Range Storage Temperature Range 7V 5.5V 0C to +70C -65C to +150C
Note 1: The "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The "Recommended Operating Conditions" table will define the conditions for actual device operation.
Recommended Operating Conditions
Symbol VCC VIH VIL IOH IOL TA Supply Voltage HIGH Level Input Voltage LOW Level Input Voltage HIGH Level Output Current (Output C4) HIGH Level Output Current (Other Outputs) LOW Level Output Current (Output C4) LOW Level Output Current (Other Outputs) Free Air Operating Temperature 0 Parameter Min 4.75 2 0.8 -0.5 -1 10 20 70 Nom 5 Max 5.25 Units V V V mA mA C
Electrical Characteristics
over recommended operating free air temperature (unless otherwise noted) Symbol VI VOH VOL II IIH IL IOS ICC1 ICC2 Parameter Input Clamp Voltage HIGH Level Output Voltage LOW Level Output Voltage Input Current @ Max Input Voltage HIGH Level Input Current LOW Level Input Current Short Circuit Output Current Supply Current Supply Current Conditions VCC = Min, II = -18 mA VCC = Min, IOH = Max VIL = Max, VIH = Min VCC = Min, IOL = Max VIH = Min, VIL = Max VCC = Max, VI = 5.5V VCC = Max, VI = 2.7V VCC = Max, VI = 0.5V VCC = Max (Note 3) VCC = Max (Note 4) VCC = Max (Note 5) C4 Output Other Outputs -20 -40 80 95 2.7 3.4 0.5 1 50 -2 -100 -100 120 160 Min Typ (Note 2) Max -1.2 Units V V V mA A mA mA mA mA
Note 2: All typicals are at VCC = 5V, TA = 25C. Note 3: Not more than one output should be shorted at a time, and the duration should not exceed one second. Note 4: ICC1 is measured with all outputs OPEN, all B inputs LOW and all other inputs at 4.5V. Note 5: ICC2 is measured with all outputs OPEN and all inputs at 4.5V.
3
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DM74S283
Switching Characteristics
at VCC = 5V and TA = 25C RL = 280 Symbol Parameter From (Input) To (Output) tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL Propagation Delay Time LOW-to-HIGH Level Output Propagation Delay Time HIGH-to-LOW Level Output Propagation Delay Time LOW-to-HIGH Level Output Propagation Delay Time HIGH-to-LOW Level Output Propagation Delay Time LOW-to-HIGH Level Output Propagation Delay Time HIGH-to-LOW Level Output Propagation Delay Time LOW-to-HIGH Level Output Propagation Delay Time HIGH-to-LOW Level Output Propagation Delay Time LOW-to-HIGH Level Output (Note 6) Propagation Delay Time HIGH-to-LOW Level Output (Note 6) Propagation Delay Time LOW-to-HIGH Level Output (Note 6) Propagation Delay Time HIGH-to-LOW Level Output (Note 6)
Note 6: RL = 560.
CL = 15 pF Min Max 18 18 18 18 18 18 18 18 11 11 12 12
CL = 50 pF Min Max 20 20 20 20 20 20 20 20 15 15 16 16
Units
C0 to 1 or 2 C0 to 1 or 2 C0 to 3 C0 to 3 C0 to 4 C0 to 4 Ai, Bi to Si Ai, Bi to Si C0 to 4 C0 to 4 Ai, Bi to C4 Ai, Bi to C4
ns ns ns ns ns ns ns ns ns ns ns ns
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DM74S283 4-Bit Binary Adder with Fast Carry
Physical Dimensions inches (millimeters) unless otherwise noted
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N16E
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 5 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com
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